In this course, you will learn all about the essential architecture components and building blocks of the CertusPro-NX physical coding sublayer (PCS) configured in 10GBASE-R Ethernet PHY. Discover how to implement 10 Gigabit Ethernet using Lattice devices, including practical design-related features, clocking, and tools. This course includes a demo using CertusPro-NX that takes you through each step of the implementation, from IP configuration to design constraints and simulation.

Learn about solutions utilizing Artificial Intelligence (AI) for edge computing. Find out why Lattice FPGAs are perfect for processing AI workloads for edge devices and discover Lattice’s sensAI Solution Stack, a complete stack of everything you need to develop an FPGA-based Machine Learning / Artificial Intelligence (ML/AI) solution.

Interested in implementing PCIe using Lattice FPGAs? This course covers the fundamentals of the PCIe protocol, including understanding the PCIe protocol stack, how packet construction, link training, and enumeration is performed, and interrupt & error handling. Find out how you can configure the Lattice IPs to build a PCIe solution and get debug tips for resolving common issues.

What is Industry 4.0 and its megatrends? Explore the challenges of the industrial Internet of Things (IoT) and learn about the OPC Unified Architecture (OPC UA). See how Lattice is addressing these industrial needs, and get introduced to the Lattice Automate Solution Stack, which provides everything you need to develop the next generation factory automation solution.

A paradigm shift in security is happening right now. Find out the evolving risks and understand fundamentals on what it takes to make your systems secure and resilient. Learn about Lattice’s Sentry Solution Stack and MachXO FPGAs and discover the complete toolkit that includes everything you need to develop a Platform Firmware Resiliency (PFR) implementation.

Get an introduction to the external memory interfaces supported on the CertusPro-NX FPGA. This course starts with an overview of the DDR/LPDDR features and specifications. Then we cover how you can implement the DDR/LPDDR memory interface in your design, using all the architecture blocks, the Memory Controller Subsystem, and by ensuring proper initialization and training.

Explore how to create a Platform Firmware Resiliency (PFR) implementation with the Lattice Sentry Solution Stack. In this course, we will introduce the Best-Known Configurations (BKC) that can be used as your PFR architecture. Then, walk you through the key design implementation steps, beginning with using the Sentry Root of Trust (RoT) template design on Lattice Propel, through debugging the design with the Serial Debug Monitor. This course will also demonstrate the Sentry Demo Board and its various features.

The Sentry Solution Stack is a complete toolkit that includes everything needed to create a custom Platform Firmware Resiliency (PFR) implementation. In this course, learn fundamentals on how to establish a Platform Root of Trust (PRoT). Then, explore the IPs and FPGA features that you can use as building blocks for your RoT design.

The Automate Solution Stack features a reference design that includes a RISC-V processor based subsystem, combined with hardware acceleration that enables flexible, low power and high performance support for multi-channel motor control, with AI-based predictive maintenance over a low-cost, real-time embedded Ethernet Network. This course goes over the full details of the system architecture, operational flow, user interface, and ends with a quick demo of the system.

See the origins of the Open Radio Access Network (ORAN), understand the key requirements for ORAN deployment, and discover Lattice’s ORAN Solution Stack 1.0, which provides all the resources you need to implement control data security.