103 results found for ""
Reveal Analyzer and Controller: Scripting and JTAG Chain
Intermediate
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12mins
Free
In this module, you will explore the functions that can be scripted using TCL and have API support. Additionally, you will learn how to efficiently debug devices in a JTAG chain, addressing common challenges encountered while utilizing the Reveal tool. We will also guide you through the utilization of the cable connection manager to optimize your debugging workflow.
Reveal Analyzer and Controller: User Memory Access
Intermediate
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9mins
Free
Discover user memory access, a GUI interface for reading from and writing to memory modules like Embedded RAM blocks, distributed memory, and Parameterized Module Instantiation (PMI). Learn to set up user memory access for Reveal Controller and enhance your debugging experience. Gain insights on configuring hardened IP blocks like PCS to generate an eye diagram.
Reveal Analyzer and Controller: Status and Control Registers
Intermediate
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8mins
Free
Gain valuable insights into the process of setting up Status and Control registers to facilitate reading from multiple signals and writing to or reading from signals within your design prior to commencing the debugging phase.
Reveal Analyzer and Controller: Virtual Switches and LEDs
Intermediate
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7mins
Free
Uncover the versatility of virtual switches and LEDs on the Reveal Controller as powerful tools for probing signal values. Explore user design considerations and join us for a detailed demonstration that illustrates the seamless integration and effective utilization of these features.
Reveal Analyzer and Controller: Debugging
Intermediate
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14mins
Free
This training module will help develop your skills in setting up your device for debugging, utilizing Analyzer debug cores, adjusting trigger conditions, and leveraging token sets to enhance waveform readability, to confidently navigate the debugging process.
Reveal Analyzer and Controller: Trace and Trigger Signals
Intermediate
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11mins
Free
Explore the types of signals utilized in debugging with Reveal Analyzer, including trace and trigger signals. Gain insights into crucial design considerations, learn step-by-step instructions for integrating these signals into your debug cores, and discover additional configuration settings for more functions.
Reveal Analyzer and Controller: Overview
Intermediate
.
8mins
Free
Gain a comprehensive understanding of Lattice's primary on-chip debugging tool, which operates in two modes: analyzer mode and controller mode. We will guide you through the various applications of Reveal, explain how to incorporate it into your project, and provide a brief overview of the disparities in usage between soft and hard JTAG.
Reveal Analyzer and Controller
Intermediate
.
1hr 13mins
Free
Gain valuable insights into effective FPGA hardware debugging with our comprehensive course. Discover the power of Reveal Analyzer and Controller, interactive tools that enable you to observe and analyze debug cores in your Lattice FPGA projects. Navigate your debugging process with confidence and optimize the performance of your FPGA designs.
Developing with ORAN Solution Stack
Intermediate
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1hr 15mins
1 Credit
Lattice ORAN Solution Stack covers the timing and synchronization requirements needed in various 3GPP/ORAN split deployment topologies. Discover how this solution stack provides secure and flexible synchronization based on the IEEE 1588v2 Precision Time Protocol (PTP) and various International Telecommunication Union (ITU) profiles. Multiple timing sources (DPLL/OCXO, and GNSS), PCIe Gen 2/3, and 10G Ethernet are supported. This course goes over wide aspects of the ORAN solution stack including how to configure and setup for the IEEE 1588 PTP and various ITU-T profiles, achieving time, frequency, and phase synchronization.
Sales Conference (SCON)
Intermediate
.
15hrs 54mins
Free
Access all the Sales Conference presentations (starting from 2023) through this archive.
Power Calculator & Power Optimization Techniques
Intermediate
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1hr 20mins
1 Credit
Unlock Lattice's Low-Power FPGA Advantage: As FPGA densities and integration levels continue to rise, optimizing your designs for power efficiency is crucial. This course offers an in-depth exploration of FPGA power consumption mechanics, power estimation tools, optimization techniques, and head-to-head power calculations against the competition. Join us and unlock the secrets of FPGA power optimization!
Power Calculator: Power Consumption Competitive Comparison
Intermediate
.
14mins
1 Credit
Compare Lattice's power consumption with the competition and gain insights on power optimizations for different types of designs, including memory-intensive, register-intensive, and DSP-intensive designs in this comprehensive module.