This course offers a deep dive into using ModelSim for verification of your FPGA design. Learn how to leverage ModelSim to maximize your simulation experience. Explore the various features that can accelerate simulation set up and enhance simulation analysis – we cover features such as the Radiant Simulator Wizard, simulation scripts, and ModelSim customizable libraries, waveform display, GUI layout, and simulation configurations.

Introducing the Hardware Checklist, which provides critical hardware implementation recommendations to assist in your FPGA board design. Learn about various considerations as you design a board for your FPGA, such as power design, configuration considerations, and handling sensitive pins. Note: In this course, we use CertusPro-NX as an example of the FPGA we are designing for. However, the board design and development guidelines apply conceptually to any FPGA board you are developing.

Explore the Lattice CrossLink-NX device architecture. In this course, we step through each and every architecture block, including the PLU, EBR-LRAM, DSP, clock network, IO, and various hard IPs (MIPI D-PHY, PCIe). For each block, learn about the features available and the architecture details to help you optimize your design.

In this in-depth course, we will explore Lattice Diamond in greater detail. Get to know each feature and tool more intimately as we unpack various applications of Diamond that can help with your development journey. Explore cross-probing capabilities that make your design inputs more efficient. Verify your design through simulations and on-chip debug. Utilize reports to guide you in optimizing your design. Follow a step-by-step tutorial to get hands-on experience of the full potential of Diamond.

The Sentry Solution Stack is a complete toolkit that includes everything needed to create a custom Platform Firmware Resiliency (PFR) implementation. In this course, learn fundamentals on how to establish a Platform Root of Trust (PRoT). Then, explore the IPs and FPGA features that you can use as building blocks for your RoT design.

The Automate Solution Stack features a reference design that includes a RISC-V processor based subsystem, combined with hardware acceleration that enables flexible, low power and high performance support for multi-channel motor control, with AI-based predictive maintenance over a low-cost, real-time embedded Ethernet Network. This course goes over the full details of the system architecture, operational flow, user interface, and ends with a quick demo of the system.

Learn fundamentals of FPGA configuration and programming in this training course. Here, we focus on the features available on the Nexus FPGAs. Get an in-depth understanding of the configuration flow, explore the status and control registers for configuration status monitoring, and review best practices for configuration debug.

Explore the Lattice iCE40 UltraPlus device architecture. In this course, we step through each and every architecture block, including the PLB, EBR, SPRAM, DSP, PLL, clock network, IO, and the I2C and SPI interface hard IPs. For each block, learn about the features available and the architecture details to help you optimize your design.

Be introduced to every feature and tool available in the Lattice Propel design environment. As we take you through the development flow, learn about the various capabilities available in Propel Builder and Propel SDK (Software Development Kit). Examples include: flexible IP integration using the IP Catalog, managing system memory during firmware development, using OpenOCD (On-Chip Debugging) for debug, and TCL scripting of development flows.

Learn all about the Lattice Diamond design software. This course covers every software element from workspace and views, managing projects, IP implementation, handling constraints, understanding reports, running simulations, to carrying out debugs. Go through the entire design flow from Synthesis, to Map, to Place & Route (PAR) to Programming. Learn about powerful tools within Diamond that will make your development easier and more efficient.