Radiant: Constraints – Entry, Effect
Intermediate · 8mins
1 Credit
Explore design constraints entry at various process stages and with different tools. The module will then explain the effects of these constraints on the design implementation process stages.
Basic Gates and Logic Elements: Voltage level, Gates, Truth Table
Basic · 7mins
Free
Be introduced to the fundamentals of gates and logic elements that are specific and most relevant to FPGAs, such as logic levels and signals, logic gates, and truth table.
Propel Walkthrough: Overview
Basic · 14mins
Free
This demonstration will guide you through the flow of building an embedded design using Lattice Propel Builder and transferring your design into Lattice Radiant for synthesis, place and route, and implementing the design into the FPGA.
Propel Builder: Getting Started
Basic · 12mins
Free
This module provides an overview of the development flow, shows project creation steps & options, and the project directory structure.
Propel Walkthrough: Lattice Propel SDK
Basic · 08mins
Free
Learn how to use Lattice Propel SDK to design your embedded software based on the SoC design created in Lattice Propel Builder.
Radiant: Constraints – Precedence
Intermediate · 9mins
1 Credit
Understand how the design constraints precedence rule can impact your design process. Get tips on recommended ways to define constraints.
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