36 results found for ""
PFR: Architecture, Best Known Configurations (BKCs)
Advanced
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8mins
2 Credit
Discover Best Known Configurations (BKC) and other options that can be used as your PFR architecture. This module summarizes the hardware connections and recovery methodologies.
Sentry Solution Stack: IPs
Advanced
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17mins
1 Credit
Explore the features onboard the MachXO family of FPGAs (such as SoC Function Block (SFB), Secure Enclave), and the IPs you can use as building blocks for your RoT design (such as RISC-V, QSPI Monitor/Streamer, I2C Monitor/Slave, SMBus Monitor/Filter/Relay/Slave/Mailbox).
External Memory Interface Solutions with Lattice
Advanced
.
31mins
1 Credit
Get an introduction to the external memory interfaces supported on the CertusPro-NX FPGA. This course starts with an overview of the DDR/LPDDR features and specifications. Then we cover how you can implement the DDR/LPDDR memory interface in your design, using all the architecture blocks, the Memory Controller Subsystem, and by ensuring proper initialization and training.
CertusPro-NX: External Memory Interfaces – Architecture
Advanced
.
12mins
1 Credit
Get to know how to implement the DDR/LPDDR memory interface using all the architecture blocks, the Memory Controller Subsystem, and by ensuring proper initialization and training.
CertusPro-NX: External Memory Interfaces Supported
Advanced
.
16mins
1 Credit
Get an introduction to the external memory interfaces supported on the CertusPro-NX FPGA. This module provides an overview and covers the evolution of the DDR/LPDDR features and specifications.
PFR Solutions with Lattice
Advanced
.
1hr 3mins
2 Credit
Explore how to create a Platform Firmware Resiliency (PFR) implementation with the Lattice Sentry Solution Stack. In this course, we will introduce the Best-Known Configurations (BKC) that can be used as your PFR architecture. Then, walk you through the key design implementation steps, beginning with using the Sentry Root of Trust (RoT) template design on Lattice Propel, through debugging the design with the Serial Debug Monitor. This course will also demonstrate the Sentry Demo Board and its various features.
Developing with Lattice FPGA: Advanced Security Features for Configuration
Advanced
.
25mins
1 Credit
Introducing the advanced security features for configuration that are available on all Lattice Nexus-based FPGAs. Learn how to implement these features through Lattice Radiant design software, including using the Programmer tool, and understanding the options available. Get insights into the lock policies and port locking mechanism to ensure proper usage of these security features.
Advanced Security Features for Configuration: Overview
Advanced
.
8mins
1 Credit
Introducing the advanced security features for configuration that are available on all Nexus products.
Radiant: Constraints – Methodology
Intermediate
.
6mins
1 Credit
Get an in-depth view of the design/timing constraints methodology and flow applied in Radiant.
Radiant: Constraints – Entry, Effect
Intermediate
.
8mins
1 Credit
Explore design constraints entry at various process stages and with different tools. The module will then explain the effects of these constraints on the design implementation process stages.
Radiant: Constraints – Constraints Propagation Engine (CPE)
Intermediate
.
11mins
1 Credit
This module explains the Constraints Propagation Engine (CPE), how it works, the CPE rules, and what to watch out for when you use CPE in your design process.
Radiant: Constraints – Known Issues, Resolution, Enhancements
Intermediate
.
7mins
1 Credit
Learn about known issues, how to resolve them, and latest Radiant enhancements that can help.