| LAB05 Project Summary | |||
|---|---|---|---|
| Implementation Name: | impl_1 | Performance Grade: | 9_High-Performance_1.0V |
| Strategy Name: | Strategy1 | Operating Condition: | COM |
| Part Number: | LFCPNX-100-9LFG672C | Synthesis: | Synplify Pro |
| Family: | LFCPNX | Timing Errors: | Place & Route, 0 (Setup), 0 (Hold) |
| Device: | LFCPNX-100 | Project Created: | 2024/08/21 09:50:23 |
| Package: | LFG672 | Project Updated: | 2024/08/26 15:09:19 |
| Project File: | D:/02_LSCC/13_VHDL/LAB05/LAB05/LAB05.rdf | ||
| Implementation Location: | D:/02_LSCC/13_VHDL/LAB05/LAB05/impl_1 | ||
| Resource Usage | |||
|---|---|---|---|
| LUT4: | 41 | IO Buffers: | 12 |
| PFU Register: | 20 | EBR: | 0 |