Lattice Mapping Report File Design: presubmult Family: LFCPNX Device: LFCPNX-100 Package: ASG256 Performance Grade: 9_High-Performance_1.0V Mapper: version Radiant Software (64-bit) 2023.2.0.38.1 Mapped on: Wed Dec 27 09:21:32 2023 Design Information Command line: map -i Lab06_impl_1_syn.udb -o Lab06_impl_1_map.udb -mp Lab06_impl_1.mrp -hierrpt -gui -msgset D:/02_LSCC/09_GSR/Final/LAB06_DSP/promote.xml Design Summary Number of registers: 0 out of 80349 (0%) Number of SLICE registers: 0 out of 79872 (0%) Number of PIO Input registers: 0 out of 159 (0%) Number of PIO Output registers: 0 out of 159 (0%) Number of PIO Tri-State registers: 0 out of 159 (0%) Number of LUT4s: 1 out of 79872 (<1%) Number used as logic LUT4s: 1 Number used as distributed RAM: 0 (6 per 16X4 RAM) Number used as ripple logic: 0 (2 per CCU2) Number of PIOs used/reserved: 86 out of 159 (54%) Number of PIOs reserved: 7 (per sysConfig and/or prohibit constraint) Number of PIOs used: 79 Number of PIOs used for single ended IO: 79 Number of PIO pairs used for differential IO: 0 Number allocated to regular speed PIOs: 68 out of 75 (91%) Number allocated to high speed PIOs: 11 out of 84 (13%) Number of Dedicated IO used for ADC/PCS/PCIE: 0 out of 34 (0%) Number of IDDR/ODDR/TDDR functions used: 0 out of 402 (0%) Number of IOs using at least one DDR function: 0 (0 differential) Number of Block RAMs: 0 out of 208 (0%) Number of Large RAMs: 0 out of 7 (0%) Number of Logical DSP Functions: Number of Pre-Adders (9+9): 2 out of 312 (1%) Number of Multipliers (18x18): 1 out of 156 (1%) Number of 9X9: 0 (1 18x18 = 2 9x9) Number of 18x18: 1 (1 18x18 = 1 18x18) Number of 18x36: 0 (2 18x18 = 1 18x36) Number of 36x36: 0 (4 18x18 = 1 36x36) Number of 54-bit Accumulators: 0 out of 78 (0%) Number of 18-bit Registers: 2 out of 312 (1%) Number of Physical DSP Components: Number of PREADD9: 2 out of 312 (1%) Used PREADD9: 2 Bypassed PREADD9: 0 Number of MULT9: 2 out of 312 (1%) Used MULT9: 2 Bypassed MULT9: 0 Number of MULT18: 1 out of 156 (1%) Used MULT18: 1 Disabled MULT18: 0 Number of MULT18X36: 0 out of 78 (0%) Number of MULT36: 0 out of 39 (0%) Number of ACC54: 0 out of 78 (0%) Number of REG18: 2 out of 312 (1%) Used REG18: 2 Bypassed REG18: 0 Number of ALUREGs: 0 out of 1 (0%) Number of PLLs: 0 out of 4 (0%) Number of DDRDLLs: 0 out of 2 (0%) Number of DLLDELs: 0 out of 10 (0%) Number of DQSs: 0 out of 11 (0%) Number of DCSs: 0 out of 2 (0%) Number of DCCs: 0 out of 62 (0%) Number of PCLKDIVs: 0 out of 2 (0%) Number of ECLKDIVs: 0 out of 12 (0%) Number of ECLKSYNCs: 0 out of 12 (0%) Number of ADC Blocks: 0 out of 1 (0%) Number of SGMIICDRs: 0 out of 2 (0%) Number of PMUs: 0 out of 1 (0%) Number of BNKREF18s: 0 out of 3 (0%) Number of BNKREF33s: 0 out of 5 (0%) Number of I2CFIFOs: 0 out of 1 (0%) Number of Oscillators: 0 out of 1 (0%) Number of GSR: 0 out of 1 (0%) Number of Cryptographic Block: 0 out of 1 (0%) Number of Config IP: 0 out of 1 (0%) TSALL: 0 out of 1 (0%) Number of JTAG: 0 out of 1 (0%) Number of SED: 0 out of 1 (0%) Number of PCSs: 0 out of 2 (0%) Number of PCIE Link Layers: 0 out of 1 (0%) Number of Clocks: 1 Net clk_c: 6 loads, 6 rising, 0 falling (Driver: Port clk) Number of Clock Enables: 1 Pin rst: 6 loads, 0 SLICEs (Net: rst_c) Number of LSRs: 1 Pin rst: 4 loads, 0 SLICEs (Net: rst_c) Top 10 highest fanout non-clock nets: Net rst_c: 10 loads Net ain_c[11]: 7 loads Net VCC: 7 loads Net bin_c[15]: 3 loads Net cin_c[15]: 3 loads Net pout_c[25]: 1 loads Net pout_c[26]: 1 loads Net pout_c[27]: 1 loads Net pout_c[28]: 1 loads Net pout_c[29]: 1 loads Number of warnings: 0 Number of errors: 0 Design Errors/Warnings No errors or warnings present. IO (PIO) Attributes +---------------------+-----------+-----------+-------+-------+-----------+ | IO Name | Direction | Levelmode | IO | IO | Special | | | | IO_TYPE | REG | DDR | IO Buffer | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[32] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[31] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[30] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[29] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[28] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[27] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[26] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[25] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[24] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[23] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[22] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[21] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[20] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[19] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[18] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[17] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[16] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[15] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[14] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[13] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[12] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[11] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[10] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[9] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[8] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[7] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[6] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[5] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[4] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[3] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[2] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[1] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | pout[0] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | cin[15] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | cin[14] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | cin[13] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | cin[12] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | cin[11] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | cin[10] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | cin[9] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | cin[8] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | cin[7] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | cin[6] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | cin[5] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | cin[4] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | cin[3] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | cin[2] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | cin[1] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | cin[0] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | bin[15] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | bin[14] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | bin[13] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | bin[12] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | bin[11] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | bin[10] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | bin[9] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | bin[8] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | bin[7] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | bin[6] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | bin[5] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | bin[4] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | bin[3] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | bin[2] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | bin[1] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | bin[0] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | ain[11] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | ain[10] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | ain[9] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | ain[8] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | ain[7] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | ain[6] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | ain[5] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | ain[4] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | ain[3] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | ain[2] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | ain[1] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | ain[0] | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | rst | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | clk | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ Removed logic Block GSR_INST undriven or does not drive anything - clipped. Block VCC_0 was optimized away. Block rst_pad_RNIDGQ2 was optimized away. ASIC Components Instance Name: mult_2_0_32_0_.\DSP_GUT[35:0].PREADD9_L0 Type: PREADD9_CORE Instance Name: mult_2_0_32_0_.\DSP_GUT[35:0].PREADD9_H0 Type: PREADD9_CORE Instance Name: mult_2_0_32_0_.\DSP_GUT[35:0].MULT9_L0 Type: MULT9_CORE Instance Name: mult_2_0_32_0_.\DSP_GUT[35:0].MULT9_H0 Type: MULT9_CORE Instance Name: mult_2_0_32_0_.\DSP_GUT[35:0].MULT18_0 Type: MULT18_CORE Instance Name: mult_2_0_32_0_.\DSP_GUT[35:0].REG18_L0_0 Type: REG18_CORE Instance Name: mult_2_0_32_0_.\DSP_GUT[35:0].REG18_L0_1 Type: REG18_CORE Constraint Summary Total number of constraints: 1 Total number of constraints dropped: 0 Run Time and Memory Usage Total CPU Time: 0 secs Total REAL Time: 6 secs Peak Memory Usage: 635 MB Checksum -- map: d824ebe4e81f81266b3fad53494f72acf138edc Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved. Copyright (c) 1995 AT&T Corp. All rights reserved. Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved. Copyright (c) 2001 Agere Systems All rights reserved. Copyright (c) 2002-2023 Lattice Semiconductor Corporation, All rights reserved.