This course introduces the Lattice CrossLinkU-NX System-on-Module Human-Machine Interface Demonstration, a complete edge AI solution for Human-Machine Interaction. You’ll explore how the demo integrates an IMX219 camera with a CrossLinkU-NX FPGA-based SoM to enable real-time person and face detection, face validation, and identification—all optimized for ultra-low power operation. The training walks through the hardware setup, AI pipeline, and visualization via the EVE SDK and web application. By the end, you’ll understand how this reference design delivers scalable, energy-efficient AI for next-generation embedded vision applications.

Dive into a training that takes you from the essentials of Holoscan SDK and Sensor Bridge to advanced techniques for scaling and configuring high-speed camera interfaces. Learn to build modular pipelines, integrate new sensors effortlessly, and deliver ultra-low-latency data streaming for next-generation AI applications at the edge.

Discover how USB works and how to harness its power using Lattice Semiconductor’s USB IP. This hands-on course dives into USB 2.0 and 3.2 fundamentals, packet structures, transfer types, and device enumeration. Learn how Lattice FPGAs enable high-speed data transfer, protocol bridging, and real-world applications like video streaming and I/O aggregation—all with practical examples and reference designs.

This training course introduces you to building efficient edge AI systems using Lattice's FPGAs and the NVIDIA Holoscan platform. You’ll explore the fundamentals of edge AI inferencing, get hands-on with Lattice’s Holoscan Sensor Bridge Board, and learn how to leverage the NVIDIA Holoscan ecosystem for high-performance sensor processing. The course also includes practical demos showing how to set up, test, and run a complete reference design, making it ideal if you are looking to deploy real-time AI at the edge.

Dive into Lattice's MIPI solutions with our comprehensive training video. This course focuses on the MIPI CSI-2 interface, covering everything from introductory specifications and timing requirements to practical applications. Learn how to leverage Lattice IPs and reference designs to optimize your projects. We’ll guide you through setting parameters, understanding image sensors, and image signal processing.

Want a quick look at Lattice various solution stacks but uncertain where to start? Take this course to gain a high-level understanding of the features, key components and use cases for each solution stack before diving into the technical details.

Lattice ORAN Solution Stack covers the timing and synchronization requirements needed in various 3GPP/ORAN split deployment topologies. Discover how this solution stack provides secure and flexible synchronization based on the IEEE 1588v2 Precision Time Protocol (PTP) and various International Telecommunication Union (ITU) profiles. Multiple timing sources (DPLL/OCXO, and GNSS), PCIe Gen 2/3, and 10G Ethernet are supported. This course goes over wide aspects of the ORAN solution stack including how to configure and setup for the IEEE 1588 PTP and various ITU-T profiles, achieving time, frequency, and phase synchronization.

Whether you're new to RISC-V or a seasoned expert looking to integrate RISC-V into your FPGA solution, this course is tailored for you. It covers comprehensive RISC-V specifications, including the user-level instruction set architecture (ISA), privileged architecture, Control and Status Registers (CSRs) and more. You will explore the RISC-V models supported on Lattice IP Cores and how their features align with the RISC-V specifications. The course culminates with a demonstration of implementing RISC-V on Lattice hardware, providing hands-on reinforcement of the concepts learned.

In this course, you will learn all about the essential architecture components and building blocks of the CertusPro-NX physical coding sublayer (PCS) configured in 10GBASE-R Ethernet PHY. Discover how to implement 10 Gigabit Ethernet using Lattice devices, including practical design-related features, clocking, and tools. This course includes a demo using CertusPro-NX that takes you through each step of the implementation, from IP configuration to design constraints and simulation.

Learn about solutions utilizing Artificial Intelligence (AI) for edge computing. Find out why Lattice FPGAs are perfect for processing AI workloads for edge devices and discover Lattice’s sensAI Solution Stack, a complete stack of everything you need to develop an FPGA-based Machine Learning / Artificial Intelligence (ML/AI) solution.